Instruction decoding in the Intel 8087 floating-point chip

386 · Ken Shirriff · Feb. 14, 2026, 5:10 p.m.
Summary
This blog post provides a deep technical dive into the instruction decoding mechanisms of the Intel 8087 floating-point coprocessor. It explains the intricate decoding circuitry, communication with the 8086 processor, and how various instructions are processed and executed. The author shares personal experiences and insights from reverse-engineering the chip, revealing the complexities and challenges encountered in its design.